/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
/*
 * Copyright (C) 2024 Arm Ltd.
 */

#ifndef _DT_BINDINGS_CLK_SUN55I_A523_R_CCU_H_
#define _DT_BINDINGS_CLK_SUN55I_A523_R_CCU_H_

#define CLK_R_AHB		0
#define CLK_R_APB0		1
#define CLK_R_APB1		2
#define CLK_R_TIMER0		3
#define CLK_R_TIMER1		4
#define CLK_R_TIMER2		5
#define CLK_BUS_R_TIMER		6
#define CLK_BUS_R_TWD		7
#define CLK_R_PWMCTRL		8
#define CLK_BUS_R_PWMCTRL	9
#define CLK_R_SPI		10
#define CLK_BUS_R_SPI		11
#define CLK_BUS_R_SPINLOCK	12
#define CLK_BUS_R_MSGBOX	13
#define CLK_BUS_R_UART0		14
#define CLK_BUS_R_UART1		15
#define CLK_BUS_R_I2C0		16
#define CLK_BUS_R_I2C1		17
#define CLK_BUS_R_I2C2		18
#define CLK_BUS_R_PPU0		19
#define CLK_BUS_R_PPU1		20
#define CLK_BUS_R_CPU_BIST	21
#define CLK_R_IR_RX		22
#define CLK_BUS_R_IR_RX		23
#define CLK_BUS_R_DMA		24
#define CLK_BUS_R_RTC		25
#define CLK_BUS_R_CPUCFG	26

#endif /* _DT_BINDINGS_CLK_SUN55I_A523_R_CCU_H_ */
