var searchData=
[
  ['a_20binary_20installer_0',['Compiling a binary installer',['../page_build_guide.html#compile_binary_installer_mscv',1,'']]],
  ['a_20custom_20name_1',['Set a custom name',['../page_identification.html#id_naming_set',1,'']]],
  ['a_20data_20node_20worker_20node_20dependency_2',['a data node =&amp;gt; worker node dependency',['../classuhd_1_1experts_1_1data__reader__t.html#autotoc_md257',1,'']]],
  ['a_20filter_20and_20antenna_20switches_3',['Frontend Side A Filter and Antenna Switches',['../page_usrp_e3xx.html#e31x_dboard_e310_frontend_a_switches',1,'']]],
  ['a_20new_20daughterboard_20id_20into_20the_20eeprom_4',['Step 2: Burn a new daughterboard id into the EEPROM',['../page_dboards.html#dboards_dbsrxmod_2',1,'']]],
  ['a_20non_20standard_20image_5',['a Non standard Image',['../page_usrp1.html#usrp1_imgs',1,'Specify a Non-standard Image'],['../page_usrp_b100.html#b100_imgs',1,'Specify a Non-standard Image'],['../page_usrp_e1x0.html#e1x0_imgs',1,'Specify a Non-standard Image'],['../page_usrp_b200.html#b200_imgs',1,'Specifying a Non-standard Image']]],
  ['a_20power_20supply_20with_20the_20b2x0_20and_20gpsdo_6',['Using a power supply with the B2x0 and GPSDO',['../page_gpsdo_b2x0.html#gpsdob_power',1,'']]],
  ['a_20receive_20streamer_7',['Create a receive streamer',['../page_usrp2.html#usrp2_altstream_rxstream',1,'']]],
  ['a_20reference_8',['Selecting a reference',['../page_octoclock.html#selecting',1,'']]],
  ['a_20shared_20lo_9',['Tuning multiple channels using a shared LO',['../page_general.html#general_tuning_multiplechannels',1,'']]],
  ['a_20simulation_20makefile_10',['Writing a Simulation Makefile',['../md_usrp3_2sim_2writing__sim__makefile.html',1,'']]],
  ['a_20subclass_11',['is required to implement the &quot;resolve&quot; method in a subclass.',['../classuhd_1_1experts_1_1worker__node__t.html#autotoc_md259',1,'']]],
  ['a_20testbench_12',['a Testbench',['../md_usrp3_2sim_2running__testbenches.html',1,'Running a Testbench'],['../md_usrp3_2sim_2writing__testbenches.html',1,'Writing a Testbench']]],
  ['a_20top_20level_20simulation_20module_13',['Writing a Top-level Simulation Module',['../md_usrp3_2sim_2writing__sim__top.html',1,'']]],
  ['a_20usrp_20device_14',['Naming a USRP Device',['../page_identification.html#id_naming',1,'']]],
  ['a_20worker_20node_20data_20node_20dependency_15',['to establish a worker node =&amp;gt; data node dependency',['../classuhd_1_1experts_1_1data__writer__t.html#autotoc_md258',1,'']]],
  ['acceleration_16',['SIMD Acceleration',['../page_usrp_x3x0_config.html#x3x0cfg_hostpc_volk',1,'']]],
  ['accessing_20user_20settings_17',['Custom FPGA images and accessing user settings',['../page_usrp_b200.html#b200_customfpga',1,'']]],
  ['accessors_18',['with accessors.',['../classuhd_1_1experts_1_1node__retriever__t.html#autotoc_md255',1,'']]],
  ['across_20frequency_19',['Retaining gain or power levels across frequency',['../page_power.html#power_tune_owner',1,'']]],
  ['action_20forwarding_20behavior_20',['Property Propagation and Action Forwarding Behavior',['../classuhd_1_1rfnoc_1_1split__stream__block__control.html#ss_fwd_behavior',1,'']]],
  ['action_20handling_21',['Action Handling',['../classuhd_1_1rfnoc_1_1replay__block__control.html#rfnoc_block_replay_actions',1,'']]],
  ['adding_20dsp_20logic_20to_20generation_202_20products_22',['Adding DSP logic to Generation 2 products',['../md_usrp2_2customize__signal__chain.html#autotoc_md103',1,'']]],
  ['additional_20build_20options_23',['Additional Build Options',['../md_usrp3_2build__instructions.html#autotoc_md146',1,'']]],
  ['additional_20documentation_24',['Additional Documentation',['../page_usrp_b200.html#b200_resources',1,'']]],
  ['additional_20stream_20arguments_25',['Additional Stream Arguments',['../page_configuration.html#config_stream_args_args',1,'']]],
  ['address_26',['Address',['../md_usrp3_2sim_2libs__axi.html#autotoc_md179',1,'']]],
  ['address_27',['address',['../page_usrp_x3x0.html#x3x0_setup_change_ip',1,'Change the USRP&apos;s IP address'],['../page_usrp2.html#usrp2_network_changeip',1,'Change the USRP2&apos;s IP address'],['../page_usrp_x3x0_config.html#x3x0cfg_hostpc_netcfg_ip',1,'Configuring the host&apos;s IP address']]],
  ['address_20string_28',['Device Configuration through address string',['../page_configuration.html#config_devaddr',1,'']]],
  ['addressing_20the_20device_29',['Addressing the Device',['../page_usrp2.html#usrp2_addr',1,'Addressing the Device'],['../page_usrp_x3x0.html#x3x0_addressing',1,'Addressing the Device']]],
  ['advanced_20usage_20notes_30',['Advanced Usage Notes',['../page_python.html#python_install_adv',1,'']]],
  ['advisory_31',['Multiple Timed Command Advisory',['../page_usrp_x3x0.html#x3x0_misc_timed_cmds_lockup',1,'']]],
  ['after_20tuning_20on_20receive_3a_32',['Pseudo-code for dealing with settling time after tuning on receive:',['../page_general.html#general_tuning_waitcode',1,'']]],
  ['align_20cordics_20in_20the_20dsp_33',['Align CORDICs in the DSP',['../page_sync.html#sync_phase_cordics',1,'']]],
  ['align_20los_20in_20the_20front_20end_20others_34',['Align LOs in the front-end (others)',['../page_sync.html#sync_phase_lootherfe',1,'']]],
  ['align_20los_20in_20the_20front_20end_20sbx_20ubx_20obx_35',['Align LOs in the front-end (SBX, UBX, OBX)',['../page_sync.html#sync_phase_lo',1,'']]],
  ['alignment_20testing_20receiver_36',['alignment testing Receiver',['../page_rdtesting.html#rdtesting_phase_rx_auto',1,'Automatic phase alignment testing (Receiver)'],['../page_rdtesting.html#rdtesting_phase_rx_manual',1,'Manual phase alignment testing (Receiver)']]],
  ['alignment_20tests_37',['Phase alignment tests',['../page_rdtesting.html#rdtesting_phasealignment',1,'']]],
  ['altera_20fpga_20builds_38',['Altera FPGA builds',['../page_images.html#images_building_altera',1,'']]],
  ['alternative_20stream_20destination_39',['Alternative stream destination',['../page_usrp2.html#usrp2_altstream',1,'']]],
  ['amplitude_20ranges_20and_20clipping_40',['Amplitude Ranges and Clipping',['../page_power.html#power_amp_rate',1,'']]],
  ['an_20application_41',['Configuring the device in an application',['../page_usrp_x3x0.html#x3x0_misc_settings',1,'']]],
  ['an_20e3xx_20usrp_20from_20uhd_42',['Using an E3XX USRP from UHD',['../page_usrp_e3xx.html#e3xx_usage',1,'']]],
  ['an_20equality_20operator_43',['- Must have an equality operator (==)',['../classuhd_1_1experts_1_1data__node__t.html#autotoc_md254',1,'']]],
  ['an_20ethernet_20compatible_20device_44',['Detecting an Ethernet-compatible device',['../page_octoclock.html#detecting_new_unit',1,'']]],
  ['an_20example_45',['An Example',['../page_gpio_api.html#xgpio_fpanel_xample',1,'']]],
  ['an_20n_20series_20device_46',['Unbricking an N-Series Device',['../page_usrp2.html#usrp2_unbrick_n2x0',1,'']]],
  ['an_20sdk_47',['Obtaining an SDK',['../page_usrp_e3xx.html#e3xx_software_dev_sdk',1,'']]],
  ['an_20x3x0_20usrp_20from_20uhd_48',['Using an X3X0 USRP from UHD',['../page_usrp_x3x0.html#x3x0_usage',1,'']]],
  ['and_2010_20mhz_20reference_20signals_49',['External PPS and 10 MHz reference signals',['../page_sync.html#sync_commonref_pps',1,'']]],
  ['and_20accessing_20user_20settings_50',['Custom FPGA images and accessing user settings',['../page_usrp_b200.html#b200_customfpga',1,'']]],
  ['and_20action_20forwarding_20behavior_51',['Property Propagation and Action Forwarding Behavior',['../classuhd_1_1rfnoc_1_1split__stream__block__control.html#ss_fwd_behavior',1,'']]],
  ['and_20antenna_20switches_52',['and Antenna Switches',['../page_usrp_e3xx.html#e31x_dboard_e310_band_select',1,'Frontend Filter and Antenna Switches'],['../page_usrp_e3xx.html#e31x_dboard_e310_frontend_a_switches',1,'Frontend Side A Filter and Antenna Switches'],['../page_usrp_e3xx.html#e31x_dboard_e310_frontend_b_switches',1,'Frontend Side B Filter and Antenna Switches']]],
  ['and_20bricking_53',['and bricking',['../page_usrp2.html#usrp2_loadflash_brick',1,'Device recovery and bricking'],['../page_usrp_x3x0.html#x3x0_flash_bricking',1,'Device recovery and bricking']]],
  ['and_20clipping_54',['Amplitude Ranges and Clipping',['../page_power.html#power_amp_rate',1,'']]],
  ['and_20community_20knowledge_20base_55',['Technical Support and Community Knowledge Base',['../page_usrp_b200.html#technical_support',1,'']]],
  ['and_20compiling_20uhd_20and_20mpm_20for_20the_20e320_56',['Modifying and compiling UHD and MPM for the E320',['../page_usrp_e3xx.html#e3xx_software_dev',1,'']]],
  ['and_20converter_20choice_57',['Formats and Converter Choice',['../page_converters.html#converters_formats',1,'']]],
  ['and_20device_20numbering_58',['Channel and Device Numbering',['../page_multiple.html#multiple_channumbers',1,'']]],
  ['and_20disabling_20usage_59',['and Disabling Usage',['../page_ni_rio_kernel.html#linux_enabling',1,'Enabling and Disabling Usage'],['../page_ni_rio_kernel.html#win_enabling',1,'Enabling and Disabling Usage']]],
  ['and_20eeprom_60',['Flash Memory and EEPROM',['../page_zbx.html#zbx_flash',1,'']]],
  ['and_20emulated_20features_61',['Missing and Emulated Features',['../page_usrp1.html#usrp1_emul',1,'']]],
  ['and_20execution_62',['Salt: Remote configuration management and execution',['../page_usrp_e3xx.html#e3xx_rasm_salt',1,'']]],
  ['and_20fedora_63',['Setting up build dependencies on Ubuntu and Fedora',['../md_usrp3_2build__instructions.html#autotoc_md114',1,'']]],
  ['and_20fpga_20images_64',['Firmware and FPGA Images',['../page_images.html',1,'page_devices']]],
  ['and_20frontend_20correction_65',['Device Calibration and Frontend Correction',['../page_calibration.html',1,'page_devices']]],
  ['and_20functions_66',['PkgTestExec Tasks and Functions',['../md_usrp3_2sim_2simulation__libraries.html#autotoc_md219',1,'']]],
  ['and_20gateway_67',['Set the subnet and gateway',['../page_usrp2.html#usrp2_altstream_subnet',1,'']]],
  ['and_20gpsdo_68',['Using a power supply with the B2x0 and GPSDO',['../page_gpsdo_b2x0.html#gpsdob_power',1,'']]],
  ['and_20handling_69',['Proper Care and Handling',['../page_usrp_b200.html#care_and_handling',1,'']]],
  ['and_20host_20operating_20system_70',['and host operating system',['../page_usrp_e3xx.html#e310_zynq',1,'The Zynq CPU/FPGA and host operating system'],['../page_usrp_e3xx.html#e320_zynq',1,'The Zynq CPU/FPGA and host operating system']]],
  ['and_20includes_71',['Timescale Defines and Includes',['../md_usrp3_2sim_2legacy__testbenches.html#autotoc_md150',1,'']]],
  ['and_20install_72',['Build and install',['../page_build_guide.html#build_install_unix',1,'']]],
  ['and_20install_20modelsim_20optional_73',['Download and Install ModelSim (Optional)',['../md_usrp3_2build__instructions.html#autotoc_md113',1,'']]],
  ['and_20install_20xilinx_20tools_74',['Download and Install Xilinx Tools',['../md_usrp3_2build__instructions.html#autotoc_md112',1,'']]],
  ['and_20installing_20uhd_20from_20source_75',['Building and Installing UHD from source',['../page_build_guide.html',1,'index']]],
  ['and_20key_76',['Serial number and key',['../classuhd_1_1usrp_1_1cal_1_1database.html#cal_db_serial',1,'']]],
  ['and_20lfrx_77',['Basic RX and LFRX',['../page_dboards.html#dboards_basicrx',1,'']]],
  ['and_20lftx_78',['Basic TX and LFTX',['../page_dboards.html#dboards_basictx',1,'']]],
  ['and_20minor_20compat_20numbers_79',['Major and Minor Compat Numbers',['../page_compat.html#compat_minor_major',1,'']]],
  ['and_20mpm_20for_20the_20e320_80',['Modifying and compiling UHD and MPM for the E320',['../page_usrp_e3xx.html#e3xx_software_dev',1,'']]],
  ['and_20n2x0_20series_81',['USRP2 and N2x0 Series',['../page_usrp2.html',1,'page_devices']]],
  ['and_20nyquist_82',['Master clock rate and Nyquist',['../page_general.html#general_sampleratenotes_nyquist',1,'']]],
  ['and_20or_20building_20uhd_83',['Installing and/or Building UHD',['../index.html#autotoc_md13',1,'']]],
  ['and_20outputs_84',['and Outputs',['../md_usrp3_2build__instructions.html#autotoc_md125',1,'B2x0 Targets and Outputs'],['../md_usrp3_2build__instructions.html#autotoc_md128',1,'B2xx-mini Targets and Outputs'],['../md_usrp3_2build__instructions.html#autotoc_md134',1,'E310 Targets and Outputs'],['../md_usrp3_2build__instructions.html#autotoc_md137',1,'E320 Targets and Outputs'],['../md_usrp2_2build__instructions.html#autotoc_md99',1,'N2x0 Targets and Outputs'],['../md_usrp3_2build__instructions.html#autotoc_md140',1,'N3xx Targets and Outputs'],['../md_usrp3_2build__instructions.html#autotoc_md124',1,'Targets and Outputs'],['../md_usrp3_2build__instructions.html#autotoc_md131',1,'X3x0 Targets and Outputs'],['../md_usrp3_2build__instructions.html#autotoc_md143',1,'X4x0 Targets and Outputs']]],
  ['and_20power_20cycling_85',['Hot-Plugging and Power-Cycling',['../page_ni_rio_kernel.html#linux_swapping',1,'']]],
  ['and_20power_20cycling_86',['Hot-plugging and Power-cycling',['../page_ni_rio_kernel.html#win_swapping',1,'']]],
  ['and_20property_20resolution_87',['Property Resolvers and Property Resolution',['../page_properties.html#props_resolvers',1,'']]],
  ['and_20read_20on_20spi_88',['Write and read on SPI',['../page_x400_gpio_api.html#x4x0_spi_r_w',1,'']]],
  ['and_20rear_20panel_89',['Front and Rear Panel',['../page_usrp_e3xx.html#e320_panels',1,'']]],
  ['and_20regulatory_20information_90',['Safety, Environmental, and Regulatory Information',['../page_usrp_b200.html#b200_seri',1,'']]],
  ['and_20reporting_20sim_5fexec_5freport_20vh_91',['Execution and Reporting (sim_exec_report.vh)',['../md_usrp3_2sim_2libs__general.html#autotoc_md186',1,'']]],
  ['and_20requirements_92',['and Requirements',['../md_usrp2_2build__instructions.html#autotoc_md94',1,'Dependencies and Requirements'],['../md_usrp3_2build__instructions.html#autotoc_md107',1,'Dependencies and Requirements']]],
  ['and_20resets_20sim_5fclks_5frsts_20vh_93',['Clocks and Resets (sim_clks_rsts.vh)',['../md_usrp3_2sim_2libs__general.html#autotoc_md193',1,'']]],
  ['and_20resource_20types_94',['Properties on multi-channel blocks and resource types',['../page_properties.html#props_multichan',1,'']]],
  ['and_20sampling_20rate_95',['Master Clock Rate, Tick Rate, and Sampling Rate',['../page_twinrx.html#twinrx_dboards_mcr',1,'']]],
  ['and_20sd_20card_20images_96',['Building custom filesystems and SD card images',['../page_usrp_e3xx.html#e3xx_fsbuild',1,'']]],
  ['and_20setup_20the_20software_20tools_20on_20your_20host_20computer_97',['Install and Setup the Software Tools on Your Host Computer',['../page_usrp_b200.html#install_software_tools',1,'']]],
  ['and_20streamers_98',['Configuring Devices and Streamers',['../page_configuration.html',1,'page_devices']]],
  ['and_20switches_99',['On-Board Connectors and Switches',['../page_usrp_b200.html#b200_switches',1,'']]],
  ['and_20the_20python_20global_20interpreter_20lock_100',['Thread Safety and the Python Global Interpreter Lock',['../page_python.html#python_usage_gil',1,'']]],
  ['and_20time_20synchronization_101',['and Time Synchronization',['../page_usrp_e3xx.html#e31x_hw_sync',1,'Clock and Time Synchronization'],['../page_usrp_e3xx.html#e320_hw_sync',1,'Clock and Time Synchronization']]],
  ['and_20tx_20reference_20power_20levels_102',['RX and TX reference power levels',['../page_power.html#power_ref_levels',1,'']]],
  ['and_20usage_103',['and Usage',['../page_ni_rio_kernel.html#linux_rio',1,'Linux NI RIO Installation and Usage'],['../page_ni_rio_kernel.html#windows_rio',1,'Windows NI RIO Installation and Usage']]],
  ['and_20usrp2_20n210_20series_20compat_20numbers_104',['X300 and USRP2/N210 Series Compat Numbers',['../page_compat.html#compat_x3u2',1,'']]],
  ['and_20verify_20the_20operation_20of_20the_20usrp_105',['Test and Verify the Operation of the USRP',['../page_usrp_b200.html#verify_device_operation',1,'']]],
  ['and_20workers_20are_20derived_20from_20this_20class_106',['graph. Data nodes and workers are derived from this class.',['../classuhd_1_1experts_1_1dag__vertex__t.html#autotoc_md253',1,'']]],
  ['antenna_20ports_107',['Antenna Ports',['../page_fbx.html#fbx_antenna',1,'Antenna Ports'],['../page_zbx.html#zbx_ant_ports',1,'Antenna Ports']]],
  ['antenna_20routing_108',['Antenna Routing',['../page_twinrx.html#twinrx_antenna_routing',1,'']]],
  ['antenna_20switches_109',['Antenna Switches',['../page_usrp_e3xx.html#e31x_dboard_e310_band_select',1,'Frontend Filter and Antenna Switches'],['../page_usrp_e3xx.html#e31x_dboard_e310_frontend_a_switches',1,'Frontend Side A Filter and Antenna Switches'],['../page_usrp_e3xx.html#e31x_dboard_e310_frontend_b_switches',1,'Frontend Side B Filter and Antenna Switches']]],
  ['api_110',['API',['../page_capi.html',1,'C API'],['../page_coding.html',1,'Coding to the API'],['../page_identification.html#id_identifying_api',1,'Device discovery through the API'],['../page_gpio_api.html',1,'GPIO API'],['../page_coding.html#coding_api_hilevelc',1,'High-Level: The C API'],['../page_coding.html#coding_api_hilevel_rfnoc',1,'High-Level: The RFNoC API'],['../page_capi.html#capi_install',1,'Installing the C API'],['../page_python.html#python_install',1,'Installing the Python API'],['../page_coding.html#coding_api_lowlevel',1,'Low-Level: The device API'],['../page_usrp_b200.html#b200_fe_power',1,'Power API'],['../page_usrp_e3xx.html#e3xx_power_api',1,'Power API'],['../page_usrp_x3x0.html#x3x0_misc_power',1,'Power API'],['../page_python.html',1,'Python API'],['../page_usrp_e3xx.html#e3xx_usage_sensors',1,'The sensor API'],['../page_c_api.html',1,'UHD - C API'],['../page_capi.html#capi_usage',1,'Using the C API'],['../page_python.html#python_usage',1,'Using the Python API'],['../page_x400_gpio_api.html',1,'X4x0 GPIO API']]],
  ['api_20documentation_111',['API Documentation',['../page_uhd.html#autotoc_md49',1,'']]],
  ['api_20interfaces_112',['Various API interfaces',['../page_coding.html#coding_api',1,'']]],
  ['apis_113',['Device Implementations of Power Level APIs',['../page_power.html#power_implementation',1,'']]],
  ['application_114',['Application',['../page_usrp_x3x0_config.html#x3x0cfg_hostpc_rtprio_app',1,'Real-Time Scheduling in your Application'],['../page_gpsdo.html#gpsdo_use',1,'Using the GPSDO in Your Application'],['../page_gpsdo_b2x0.html#gpsdob_using',1,'Using the GPSDO in Your Application'],['../page_gpsdo_x3x0.html#gpsdox_using',1,'Using the GPSDO in Your Application']]],
  ['application_115',['Configuring the device in an application',['../page_usrp_x3x0.html#x3x0_misc_settings',1,'']]],
  ['application_20notes_116',['General Application Notes',['../page_general.html',1,'page_devices']]],
  ['application_20notes_20usrp_20b2x0_20models_117',['Internal GPSDO Application Notes (USRP-B2x0 Models)',['../page_gpsdo_b2x0.html',1,'page_usrp_b200']]],
  ['application_20notes_20usrp_20x3x0_20models_118',['Internal GPSDO Application Notes (USRP-X3x0 Models)',['../page_gpsdo_x3x0.html',1,'page_usrp_x3x0']]],
  ['applications_119',['One-off transmit/receive applications',['../page_python.html#python_usage_oneoff',1,'']]],
  ['applications_20that_20require_20uhd_20using_20cmake_120',['Building applications that require UHD using CMake',['../page_build_guide.html#build_apps',1,'']]],
  ['aq_121',['AQ',['../page_rdtesting.html#autotoc_md41',1,'']]],
  ['architecture_122',['The Module Peripheral Manager (MPM) Architecture',['../page_mpm.html',1,'page_devices']]],
  ['architecture_123',['E310 Migration Guide to MPM architecture',['../page_usrp_e3xx.html#e31x_migration',1,'']]],
  ['architecture_20overview_124',['Architecture Overview',['../page_mpm.html#mpm_arch',1,'']]],
  ['archive_20install_125',['Archive install',['../page_images.html#images_prebuilt_archive',1,'']]],
  ['are_20derived_20from_20this_20class_126',['graph. Data nodes and workers are derived from this class.',['../classuhd_1_1experts_1_1dag__vertex__t.html#autotoc_md253',1,'']]],
  ['are_20there_20so_20many_20different_20compat_20numbers_127',['Why are there so many different compat numbers?',['../page_compat.html#compat_faq_whymany',1,'']]],
  ['args_128',['Args',['../page_dpdk.html#dpdk_device_args',1,'Enabling DPDK with UHD Device Args'],['../page_configuration.html#config_stream_args',1,'Streaming Arguments (Stream Args)']]],
  ['arguments_129',['Arguments',['../page_configuration.html#config_stream_args_args',1,'Additional Stream Arguments'],['../page_configuration.html#config_stream_args_transport',1,'Transport-related Stream Arguments']]],
  ['arguments_130',['arguments',['../page_usrp_e3xx.html#e3xx_usage_device_args',1,'Device arguments'],['../page_usrp_x3x0.html#x3x0_usage_device_args',1,'Device arguments']]],
  ['arguments_20stream_20args_131',['Streaming Arguments (Stream Args)',['../page_configuration.html#config_stream_args',1,'']]],
  ['arm_20platforms_132',['Compiling for ARM platforms',['../page_build_guide.html#build_instructions_unix_arm',1,'']]],
  ['assembling_20the_20e3xx_133',['Assembling the E3XX',['../page_usrp_e3xx.html#e3xx_getting_started_assembling',1,'']]],
  ['assembling_20the_20x300_20x310_20kit_134',['Assembling the X300/X310 kit',['../page_usrp_x3x0.html#x3x0_getting_started_assembling',1,'']]],
  ['assembly_20instructions_135',['Enclosure Assembly Instructions',['../page_usrp_b200.html#b200_enclosure_assembly_instructions',1,'']]],
  ['assert_5ferror_136',['ASSERT_ERROR',['../md_usrp3_2sim_2libs__general.html#autotoc_md191',1,'']]],
  ['assert_5ffatal_137',['ASSERT_FATAL',['../md_usrp3_2sim_2libs__general.html#autotoc_md190',1,'']]],
  ['assert_5fwarning_138',['ASSERT_WARNING',['../md_usrp3_2sim_2libs__general.html#autotoc_md192',1,'']]],
  ['at_20once_139',['Calibrating multiple paths at once',['../page_power.html#power_cal_switch',1,'']]],
  ['atr_140',['ATR',['../page_fbx.html#fbx_atr',1,'Auto-Transmit-Receive Registers (ATR)'],['../page_zbx.html#zbx_atr',1,'Auto-Transmit-Receive Registers (ATR)'],['../page_gpio_api.html#xgpio_fpanel_atr',1,'Explaining ATR']]],
  ['atr_20control_141',['ATR control',['../page_zbx.html#zbx_gain_table',1,'CPLD-Table Gain Profile with ATR control'],['../page_zbx.html#zbx_gain_tablenoatr',1,'CPLD-Table Gain Profile without ATR control']]],
  ['attributes_20of_20properties_142',['Clean/Dirty Attributes of Properties',['../page_properties.html#props_resolvers_cldrty',1,'']]],
  ['auto_20transmit_20receive_20registers_20atr_143',['Auto Transmit Receive Registers ATR',['../page_fbx.html#fbx_atr',1,'Auto-Transmit-Receive Registers (ATR)'],['../page_zbx.html#zbx_atr',1,'Auto-Transmit-Receive Registers (ATR)']]],
  ['automatic_20clock_20rate_20setting_144',['Automatic Clock Rate Setting',['../page_usrp_b200.html#b200_auto_mcr',1,'']]],
  ['automatic_20master_20clock_20selection_145',['Automatic master-clock selection',['../page_general.html#general_sampleratenotes_automatic',1,'']]],
  ['automatic_20phase_20alignment_20testing_20receiver_146',['Automatic phase alignment testing (Receiver)',['../page_rdtesting.html#rdtesting_phase_rx_auto',1,'']]],
  ['automatic_20procedure_147',['Automatic Procedure',['../page_rdtesting.html#rdtesting_bist_e320_auto',1,'E320 Automatic Procedure'],['../page_rdtesting.html#rdtesting_bist_n3x0_auto',1,'N300/N310 Automatic Procedure']]],
  ['automatic_20test_20procedure_148',['Automatic Test Procedure',['../page_rdtesting.html#rdtesting_fpga_testbenches_auto',1,'Automatic Test Procedure'],['../page_rdtesting.html#rdtesting_devtest_auto',1,'Devtest: Automatic Test Procedure'],['../page_rdtesting.html#rdtesting_fpgadspverif_auto',1,'FPGA DSP Verification: Automatic Test Procedure'],['../page_rdtesting.html#rdtesting_fpgafuncverif_auto',1,'FPGA Functional Verification: Automatic Test Procedure'],['../page_rdtesting.html#rdtesting_gpsdo_auto',1,'GPSDO: Automatic Test Procedure']]],
  ['available_20commands_149',['Available commands',['../page_usrpctl.html#usrpctl_commands',1,'']]],
  ['available_20sensors_150',['Available Sensors',['../page_usrp2.html#usrp2_misc_sensors',1,'Available Sensors'],['../page_usrp_b100.html#b100_misc_sensors',1,'Available Sensors'],['../page_usrp_e1x0.html#e1x0_misc_sensors',1,'Available Sensors'],['../page_usrp_x3x0.html#x3x0_misc_sensors',1,'Available Sensors']]],
  ['axi_20interface_20libraries_151',['Legacy AXI Interface Libraries',['../md_usrp3_2sim_2libs__axi.html',1,'']]],
  ['axi4_20reader_152',['Meta: AXI4 Reader',['../md_usrp3_2sim_2libs__axi.html#autotoc_md184',1,'']]],
  ['axi4_20sim_5faxi4_5flib_20vh_153',['Memory Mapped AXI4 (sim_axi4_lib.vh)',['../md_usrp3_2sim_2libs__axi.html#autotoc_md178',1,'']]],
  ['axi4_20stream_20sim_5faxis_5flib_20vh_154',['AXI4 Stream (sim_axis_lib.vh)',['../md_usrp3_2sim_2libs__axi.html#autotoc_md154',1,'']]],
  ['axi4_20writer_155',['Meta: AXI4 Writer',['../md_usrp3_2sim_2libs__axi.html#autotoc_md183',1,'']]]
];
