var searchData=
[
  ['d_20testing_20procedures_0',['R&amp;amp;D Testing Procedures',['../page_rdtesting.html',1,'page_uhd']]],
  ['d_20tests_1',['Defining R&amp;amp;D Tests',['../page_rdtesting.html#rdtesting_defining',1,'']]],
  ['data_2',['Data',['../page_calibration.html#calibration_data',1,'Calibration Data'],['../page_calibration.html#modify_cal_data',1,'Modify Calibration Data'],['../classuhd_1_1rfnoc_1_1replay__block__control.html#rfnoc_block_replay_playback',1,'Playing back Data'],['../md_usrp3_2sim_2libs__axi.html#autotoc_md182',1,'Read Data'],['../classuhd_1_1rfnoc_1_1replay__block__control.html#rfnoc_block_replay_record',1,'Recording Data'],['../md_usrp3_2sim_2libs__axi.html#autotoc_md180',1,'Write Data']]],
  ['data_3',['Format of binary data',['../classuhd_1_1usrp_1_1cal_1_1database.html#cal_db_blob',1,'']]],
  ['data_20format_20specification_4',['Data Format Specification',['../page_configuration.html#config_stream_args_cpu_format',1,'CPU Data Format Specification'],['../page_configuration.html#config_stream_args_otw_format',1,'Over-the-wire Data Format Specification']]],
  ['data_20node_20dependency_5',['to establish a worker node =&amp;gt; data node dependency',['../classuhd_1_1experts_1_1data__writer__t.html#autotoc_md258',1,'']]],
  ['data_20node_20worker_20node_20dependency_6',['a data node =&amp;gt; worker node dependency',['../classuhd_1_1experts_1_1data__reader__t.html#autotoc_md257',1,'']]],
  ['data_20nodes_20and_20workers_20are_20derived_20from_20this_20class_7',['graph. Data nodes and workers are derived from this class.',['../classuhd_1_1experts_1_1dag__vertex__t.html#autotoc_md253',1,'']]],
  ['data_20plane_20development_20kit_8',['DPDK, Data Plane Development Kit',['../page_dpdk.html',1,'page_devices']]],
  ['data_20size_20restrictions_20in_20transport_9',['Data size restrictions in transport',['../page_transport.html#transport_data_size_restrictions',1,'']]],
  ['data_20to_20uhd_204_10',['Converting UHD 3.x calibration data to UHD 4',['../page_calibration.html#calibration_data_csv',1,'']]],
  ['data_20type_11',['data type',['../page_stream.html#stream_datatypes_cpu',1,'The host/CPU data type'],['../page_stream.html#stream_datatypes_otw',1,'The link-layer data type']]],
  ['data_20types_12',['Data Types',['../page_stream.html#stream_datatypes',1,'']]],
  ['data_5ffile_5ft_13',['interface data_file_t',['../md_usrp3_2sim_2libs__general.html#autotoc_md199',1,'']]],
  ['daughterboard_14',['Daughterboard',['../page_fbx.html',1,'FBX Daughterboard'],['../page_twinrx.html',1,'TwinRX Daughterboard'],['../page_zbx.html',1,'ZBX Daughterboard']]],
  ['daughterboard_20clock_15',['Daughterboard clock',['../page_usrp_x3x0.html#x3x0_set_clocking_dboard',1,'']]],
  ['daughterboard_20frontend_20names_16',['Daughterboard Frontend Names',['../page_configuration.html#config_subdev_dbnames',1,'']]],
  ['daughterboard_20id_20into_20the_20eeprom_17',['Step 2: Burn a new daughterboard id into the EEPROM',['../page_dboards.html#dboards_dbsrxmod_2',1,'']]],
  ['daughterboard_20notes_18',['Daughterboard notes',['../page_usrp_e3xx.html#e31x_dboards',1,'']]],
  ['daughterboard_20properties_19',['Daughterboard Properties',['../page_dboards.html#dboards',1,'']]],
  ['daughterboard_20reference_20clock_20',['Daughterboard reference clock',['../page_dboards.html#dboards_clock_rate',1,'']]],
  ['daughterboards_21',['Daughterboards',['../page_dboards.html',1,'Daughterboards'],['../page_devices.html#autotoc_md6',1,'Daughterboards']]],
  ['db15_20gpio_20loopback_22',['DB15 GPIO Loopback',['../page_rdtesting.html#rdtesting_n3xx_peripherals_gpiolb',1,'']]],
  ['dbsrx_23',['DBSRX',['../page_dboards.html#dboards_dbsrx',1,'']]],
  ['dbsrx_20modifying_20for_20other_20boards_20that_20usrp1_24',['DBSRX - Modifying for other boards that USRP1',['../page_dboards.html#dboards_dbsrxmod',1,'']]],
  ['dbsrx2_25',['DBSRX2',['../page_dboards.html#dboards_dbsrx2',1,'']]],
  ['dc_20offset_20compensation_26',['Single-Tap DC Offset Compensation',['../page_calibration.html#calibration_fe_corr_dc_offset',1,'']]],
  ['dealing_20with_20settling_20time_20after_20tuning_20on_20receive_3a_27',['Pseudo-code for dealing with settling time after tuning on receive:',['../page_general.html#general_tuning_waitcode',1,'']]],
  ['debugging_28',['Python-based Debugging',['../page_mpm.html#mpm_debug_python',1,'']]],
  ['debugging_20custom_20fpga_20designs_20with_20xilinx_20chipscope_29',['Debugging custom FPGA designs with Xilinx Chipscope',['../page_usrp_e3xx.html#e31x_hw_chipscope',1,'Debugging custom FPGA designs with Xilinx Chipscope'],['../page_usrp_x3x0.html#x3x0_hw_chipscope',1,'Debugging custom FPGA designs with Xilinx Chipscope']]],
  ['debugging_20tools_30',['Debugging Tools',['../page_mpm.html#mpm_debug',1,'']]],
  ['default_20gain_20profile_31',['Default Gain Profile',['../page_zbx.html#zbx_gain_default',1,'']]],
  ['define_5fclk_32',['DEFINE_CLK',['../md_usrp3_2sim_2libs__general.html#autotoc_md194',1,'']]],
  ['define_5flate_5fstart_5fclk_33',['DEFINE_LATE_START_CLK',['../md_usrp3_2sim_2libs__general.html#autotoc_md195',1,'']]],
  ['define_5freset_34',['DEFINE_RESET',['../md_usrp3_2sim_2libs__general.html#autotoc_md196',1,'']]],
  ['define_5freset_5fn_35',['DEFINE_RESET_N',['../md_usrp3_2sim_2libs__general.html#autotoc_md197',1,'']]],
  ['defines_20and_20includes_36',['Timescale Defines and Includes',['../md_usrp3_2sim_2legacy__testbenches.html#autotoc_md150',1,'']]],
  ['defining_20properties_37',['Defining Properties',['../page_properties.html#props_define',1,'']]],
  ['defining_20r_20d_20tests_38',['Defining R&amp;amp;D Tests',['../page_rdtesting.html#rdtesting_defining',1,'']]],
  ['definition_39',['Definition',['../md_usrp3_2sim_2libs__axi.html#autotoc_md155',1,'Definition'],['../md_usrp3_2sim_2libs__axi.html#autotoc_md168',1,'Definition'],['../md_usrp3_2sim_2legacy__testbenches.html#autotoc_md151',1,'Main Module Definition']]],
  ['dependencies_40',['Dependencies',['../page_build_guide.html#autotoc_md85',1,'Background Dependencies'],['../page_build_guide.html#build_dependencies',1,'Build Dependencies'],['../md_usrp2_2build__instructions.html#autotoc_md95',1,'Dependencies'],['../md_usrp3_2build__instructions.html#autotoc_md108',1,'Dependencies']]],
  ['dependencies_20and_20requirements_41',['Dependencies and Requirements',['../md_usrp2_2build__instructions.html#autotoc_md94',1,'Dependencies and Requirements'],['../md_usrp3_2build__instructions.html#autotoc_md107',1,'Dependencies and Requirements']]],
  ['dependencies_20on_20fedora_42',['Setting up the dependencies on Fedora',['../page_build_guide.html#build_dependencies_fedora',1,'']]],
  ['dependencies_20on_20ubuntu_43',['Setting up the dependencies on Ubuntu',['../page_build_guide.html#build_dependencies_ubuntu',1,'']]],
  ['dependencies_20on_20ubuntu_20and_20fedora_44',['Setting up build dependencies on Ubuntu and Fedora',['../md_usrp3_2build__instructions.html#autotoc_md114',1,'']]],
  ['dependencies_20on_20windows_20using_20cygwin_45',['Setting up build dependencies on Windows (using Cygwin)',['../md_usrp3_2build__instructions.html#autotoc_md115',1,'']]],
  ['dependency_46',['dependency',['../classuhd_1_1experts_1_1data__reader__t.html#autotoc_md257',1,'a data node =&amp;gt; worker node dependency'],['../classuhd_1_1experts_1_1data__writer__t.html#autotoc_md258',1,'to establish a worker node =&amp;gt; data node dependency']]],
  ['dependency_20relationships_47',['establish dependency relationships.',['../classuhd_1_1experts_1_1data__accessor__t.html#autotoc_md256',1,'']]],
  ['deprecated_20list_48',['Deprecated List',['../deprecated.html',1,'']]],
  ['derived_20from_20this_20class_49',['graph. Data nodes and workers are derived from this class.',['../classuhd_1_1experts_1_1dag__vertex__t.html#autotoc_md253',1,'']]],
  ['description_50',['Description',['../page_usrpctl.html#usrpctl_description',1,'']]],
  ['design_51',['Modify existing Vivado Tcl-based Block Design',['../md_usrp3_2vivado__env__utils.html#autotoc_md245',1,'']]],
  ['design_20bd_52',['Modify existing Vivado Block Design (BD)',['../md_usrp3_2vivado__env__utils.html#autotoc_md244',1,'']]],
  ['design_20specific_53',['Section 2: Design Specific',['../md_usrp3_2sim_2writing__sim__makefile.html#autotoc_md228',1,'']]],
  ['designs_20with_20xilinx_20chipscope_54',['designs with Xilinx Chipscope',['../page_usrp_e3xx.html#e31x_hw_chipscope',1,'Debugging custom FPGA designs with Xilinx Chipscope'],['../page_usrp_x3x0.html#x3x0_hw_chipscope',1,'Debugging custom FPGA designs with Xilinx Chipscope']]],
  ['desktop_55',['PCI Express (Desktop)',['../page_usrp_x3x0.html#x3x0_hw_pcie',1,'']]],
  ['destination_56',['Alternative stream destination',['../page_usrp2.html#usrp2_altstream',1,'']]],
  ['details_57',['CPLD Programming: Details',['../page_zbx.html#zbx_updating_cpld_details',1,'']]],
  ['detecting_20an_20ethernet_20compatible_20device_58',['Detecting an Ethernet-compatible device',['../page_octoclock.html#detecting_new_unit',1,'']]],
  ['detection_59',['DPDK Link Detection',['../page_dpdk.html#dpdk_link_detection',1,'']]],
  ['development_20kit_60',['DPDK, Data Plane Development Kit',['../page_dpdk.html',1,'page_devices']]],
  ['development_20manual_61',['UHD Development Manual',['../page_uhd.html',1,'index']]],
  ['device_62',['Device',['../page_usrp2.html#usrp2_addr',1,'Addressing the Device'],['../page_usrp_x3x0.html#x3x0_addressing',1,'Addressing the Device'],['../page_usrp_x3x0.html#x3x0_load_fpga_imgs',1,'Load FPGA Images onto the Device'],['../page_identification.html#id_naming',1,'Naming a USRP Device'],['../page_usrp2.html#usrp2_unbrick_n2x0',1,'Unbricking an N-Series Device']]],
  ['device_63',['device',['../page_octoclock.html#bootloader',1,'Burning the bootloader onto the device'],['../page_power.html#power_usercal',1,'Calibrating your own device'],['../page_octoclock.html#detecting_new_unit',1,'Detecting an Ethernet-compatible device'],['../page_usrp2.html#usrp2_commprob_ping',1,'Ping the device'],['../page_usrp_x3x0.html#x3x0_comm_issues_ping',1,'Ping the device'],['../page_octoclock.html#upgrading_device',1,'Upgrading your device'],['../page_octoclock.html#usage',1,'Using your device']]],
  ['device_200_3a_64',['Configuration for USRP-X Series device 0:',['../page_usrp_x3x0.html#autotoc_md69',1,'']]],
  ['device_201_3a_65',['Configuration for USRP-X Series device 1:',['../page_usrp_x3x0.html#autotoc_md70',1,'']]],
  ['device_20api_66',['Low-Level: The device API',['../page_coding.html#coding_api_lowlevel',1,'']]],
  ['device_20args_67',['Enabling DPDK with UHD Device Args',['../page_dpdk.html#dpdk_device_args',1,'']]],
  ['device_20arguments_68',['Device arguments',['../page_usrp_e3xx.html#e3xx_usage_device_args',1,'Device arguments'],['../page_usrp_x3x0.html#x3x0_usage_device_args',1,'Device arguments']]],
  ['device_20calibration_20and_20frontend_20correction_69',['Device Calibration and Frontend Correction',['../page_calibration.html',1,'page_devices']]],
  ['device_20claiming_70',['Device Claiming',['../page_mpm.html#mpm_arch_claiming',1,'']]],
  ['device_20configuration_71',['device configuration',['../page_usrp2.html#usrp2_',1,'Multiple device configuration'],['../page_usrp_x3x0.html#x3x0_addressing_multidevcfg',1,'Multiple device configuration'],['../page_usrp2.html#usrp2_addr_single',1,'Single device configuration'],['../page_usrp_x3x0.html#x3x0_addressing_singledev',1,'Single device configuration']]],
  ['device_20configuration_20through_20address_20string_72',['Device Configuration through address string',['../page_configuration.html#config_devaddr',1,'']]],
  ['device_20configuration_20through_20mpm_20configuration_20files_73',['Device Configuration through MPM configuration files',['../page_configuration.html#config_mpm',1,'']]],
  ['device_20discovery_20through_20the_20api_74',['Device discovery through the API',['../page_identification.html#id_identifying_api',1,'']]],
  ['device_20discovery_20via_20command_20line_75',['Device discovery via command line',['../page_identification.html#id_identifying_cmdline',1,'']]],
  ['device_20embedded_20mode_76',['USRP E3xx Device (Embedded Mode)',['../page_rdtesting.html#autotoc_md21',1,'']]],
  ['device_20identification_77',['Device Identification',['../page_identification.html',1,'page_devices']]],
  ['device_20identifiers_78',['Common device identifiers',['../page_identification.html#id_identifying_common',1,'']]],
  ['device_20implementations_20of_20power_20level_20apis_79',['Device Implementations of Power Level APIs',['../page_power.html#power_implementation',1,'']]],
  ['device_20in_20an_20application_80',['Configuring the device in an application',['../page_usrp_x3x0.html#x3x0_misc_settings',1,'']]],
  ['device_20not_20enumerated_20over_20pci_20express_20linux_81',['Device not enumerated over PCI-Express (Linux)',['../page_usrp_x3x0.html#x3x0_comm_issues_not_enumerated',1,'']]],
  ['device_20not_20enumerated_20over_20pci_20express_20windows_82',['Device not enumerated over PCI-Express (Windows)',['../page_usrp_x3x0.html#x3x0_comm_issues_not_enumerated_win',1,'']]],
  ['device_20numbering_83',['Channel and Device Numbering',['../page_multiple.html#multiple_channumbers',1,'']]],
  ['device_20over_20jtag_84',['Program device over JTAG',['../md_usrp3_2vivado__env__utils.html#autotoc_md251',1,'']]],
  ['device_20properties_85',['Device properties',['../page_identification.html#id_identifying_props',1,'']]],
  ['device_20recovery_20and_20bricking_86',['Device recovery and bricking',['../page_usrp2.html#usrp2_loadflash_brick',1,'Device recovery and bricking'],['../page_usrp_x3x0.html#x3x0_flash_bricking',1,'Device recovery and bricking']]],
  ['device_20s_20eeprom_87',['Updating the device&apos;s EEPROM',['../page_octoclock.html#eeprom',1,'']]],
  ['device_20streaming_88',['Device streaming',['../page_stream.html',1,'page_uhd']]],
  ['device_20synchronization_89',['Device Synchronization',['../page_sync.html',1,'page_devices']]],
  ['device_20time_90',['Synchronizing the Device Time',['../page_sync.html#sync_time',1,'']]],
  ['device_20time_20to_20gps_20time_91',['Setting Device Time to GPS time',['../page_gpsdo_x3x0.html#gpsdox_setting_gps_time',1,'']]],
  ['devices_92',['Devices',['../page_identification.html#id_identifying',1,'Identifying USRP Devices'],['../page_devices.html#autotoc_md2',1,'USRP B-Series Devices'],['../page_devices.html#autotoc_md3',1,'USRP E-Series Devices'],['../page_devices.html#autotoc_md1',1,'USRP N-Series Devices'],['../page_devices.html#autotoc_md4',1,'USRP X-Series Devices']]],
  ['devices_93',['devices',['../page_rtp.html#rtp_legacy_chdr',1,'Legacy CHDR (Used by B200-series devices)'],['../md_usrp3_2vivado__env__utils.html#autotoc_md250',1,'List connected JTAG devices'],['../page_power.html#power_usercal_extend_generic',1,'Other measurement devices'],['../page_multiple.html#multiple_setup',1,'Setting up devices'],['../page_power.html#power_usercal_extend_visa',1,'VISA/SCPI based devices']]],
  ['devices_20and_20streamers_94',['Configuring Devices and Streamers',['../page_configuration.html',1,'page_devices']]],
  ['devices_20n310_20e320_20x4x0_95',['MPM Devices (N310, E320, X4x0)',['../page_compat.html#compat_mpm',1,'']]],
  ['devices_20per_20host_96',['devices per host',['../page_usrp2.html#usrp2_network_multidev',1,'Multiple devices per host'],['../page_usrp_x3x0.html#x3x0_setup_network_multidevs',1,'Multiple devices per host']]],
  ['devices_20usage_20manual_97',['Devices &amp;amp; Usage Manual',['../page_devices.html',1,'index']]],
  ['devices_20x440_20x410_20x3x0_20n3xx_20series_20e320_98',['RFNoC Devices (X440, X410, X3x0, N3xx Series, E320)',['../page_stream.html#stream_remote_rfnoc',1,'']]],
  ['devtest_20using_20python_20test_20suite_99',['Running devtest using python test suite',['../page_rdtesting.html#autotoc_md15',1,'']]],
  ['devtest_20using_20uhd_20make_100',['Running devtest using UHD make',['../page_rdtesting.html#autotoc_md14',1,'']]],
  ['devtest_3a_20automatic_20test_20procedure_101',['Devtest: Automatic Test Procedure',['../page_rdtesting.html#rdtesting_devtest_auto',1,'']]],
  ['devtest_3a_20manual_20test_20procedure_102',['Devtest: Manual Test Procedure',['../page_rdtesting.html#rdtesting_devtest_manual',1,'']]],
  ['devtests_103',['Devtests',['../page_rdtesting.html#rdtesting_devtest',1,'']]],
  ['different_20compat_20numbers_104',['Why are there so many different compat numbers?',['../page_compat.html#compat_faq_whymany',1,'']]],
  ['digital_20control_105',['Digital Control',['../page_fbx.html#fbx_too_dctrl',1,'Digital Control'],['../page_zbx.html#zbx_too_cpld',1,'Digital Control']]],
  ['dirty_20attributes_20of_20properties_106',['Clean/Dirty Attributes of Properties',['../page_properties.html#props_resolvers_cldrty',1,'']]],
  ['disabling_20or_20redirecting_20prints_20to_20stdout_107',['Disabling or redirecting prints to stdout',['../page_general.html#general_misc_prints',1,'']]],
  ['disabling_20usage_108',['Disabling Usage',['../page_ni_rio_kernel.html#linux_enabling',1,'Enabling and Disabling Usage'],['../page_ni_rio_kernel.html#win_enabling',1,'Enabling and Disabling Usage']]],
  ['discovery_20through_20the_20api_109',['Device discovery through the API',['../page_identification.html#id_identifying_api',1,'']]],
  ['discovery_20via_20command_20line_110',['Device discovery via command line',['../page_identification.html#id_identifying_cmdline',1,'']]],
  ['discovery_20via_20name_111',['Discovery via name',['../page_identification.html#id_naming_discovery',1,'']]],
  ['docker_20to_20build_20filesystems_112',['Using Docker to build filesystems',['../page_usrp_e3xx.html#e3xx_fsbuild_docker',1,'']]],
  ['documentation_113',['Documentation',['../page_usrp_b200.html#b200_resources',1,'Additional Documentation'],['../page_uhd.html#autotoc_md49',1,'API Documentation'],['../md_usrp1__build__instructions.html',1,'Generation 1 USRP Build Documentation'],['../md_usrp2_2build__instructions.html',1,'Generation 2 USRP Build Documentation'],['../md_usrp3_2build__instructions.html',1,'Generation 3 USRP Build Documentation']]],
  ['documentation_114',['Extension Framework documentation',['../page_extension.html',1,'page_devices']]],
  ['does_20my_20usrp_20have_115',['does my USRP have',['../md_usrp2_2build__instructions.html#autotoc_md97',1,'What FPGA does my USRP have?'],['../md_usrp3_2build__instructions.html#autotoc_md110',1,'What FPGA does my USRP have?']]],
  ['download_20and_20install_20modelsim_20optional_116',['Download and Install ModelSim (Optional)',['../md_usrp3_2build__instructions.html#autotoc_md113',1,'']]],
  ['download_20and_20install_20xilinx_20tools_117',['Download and Install Xilinx Tools',['../md_usrp3_2build__instructions.html#autotoc_md112',1,'']]],
  ['downloader_118',['UHD Images Downloader',['../page_images.html#images_prebuilt_downloader',1,'']]],
  ['doxygen_119',['Doxygen',['../page_build_guide.html#autotoc_md80',1,'']]],
  ['dpdk_120',['Configuring DPDK',['../page_configfiles.html#configfiles_usrps_dpdk',1,'']]],
  ['dpdk_20data_20plane_20development_20kit_121',['DPDK, Data Plane Development Kit',['../page_dpdk.html',1,'page_devices']]],
  ['dpdk_20in_20uhd_122',['Using DPDK in UHD',['../page_dpdk.html#dpdk_using',1,'']]],
  ['dpdk_20installation_20instructions_123',['DPDK Installation Instructions',['../page_dpdk.html#dpdk_installation',1,'']]],
  ['dpdk_20link_20detection_124',['DPDK Link Detection',['../page_dpdk.html#dpdk_link_detection',1,'']]],
  ['dpdk_20overview_125',['DPDK Overview',['../page_dpdk.html#dpdk_overview',1,'']]],
  ['dpdk_20setup_126',['DPDK Setup',['../page_dpdk.html#dpdk_setup',1,'']]],
  ['dpdk_20support_127',['DPDK Support',['../page_usrp_x3x0.html#autotoc_md60',1,'']]],
  ['dpdk_20with_20uhd_20device_20args_128',['Enabling DPDK with UHD Device Args',['../page_dpdk.html#dpdk_device_args',1,'']]],
  ['driver_129',['Driver',['../page_usrp_e3xx.html#e312_battery_information',1,'']]],
  ['driver_20in_20linux_130',['Uninstalling the Driver in Linux',['../page_ni_rio_kernel.html#linux_uninstalling',1,'']]],
  ['driver_20windows_131',['Install USB driver (Windows)',['../page_transport.html#transport_usb_installwin',1,'']]],
  ['drivers_132',['Drivers',['../page_usrp_x3x0.html#autotoc_md62',1,'Installing the PCIe Kernel Drivers'],['../page_usrp_x3x0.html#autotoc_md66',1,'Installing the PCIe Kernel Drivers']]],
  ['drivers_133',['Extending the calibration utility for custom drivers',['../page_power.html#power_usercal_extend',1,'']]],
  ['drivers_20in_20linux_134',['Installing the Drivers in Linux',['../page_ni_rio_kernel.html#linux_installation',1,'']]],
  ['dsp_135',['Align CORDICs in the DSP',['../page_sync.html#sync_phase_cordics',1,'']]],
  ['dsp_20frequency_20on_20tx_20vs_20rx_20tuning_136',['Sign of DSP frequency on TX vs. RX tuning',['../page_general.html#general_tuning_dsp_sign',1,'']]],
  ['dsp_20logic_20to_20generation_202_20products_137',['Adding DSP logic to Generation 2 products',['../md_usrp2_2customize__signal__chain.html#autotoc_md103',1,'']]],
  ['dsp_20tuning_138',['DSP Tuning',['../page_general.html#general_tuning_dsp',1,'']]],
  ['dsp_20verification_139',['FPGA DSP Verification',['../page_rdtesting.html#rdtesting_fpgadspverif',1,'']]],
  ['dsp_20verification_3a_20automatic_20test_20procedure_140',['FPGA DSP Verification: Automatic Test Procedure',['../page_rdtesting.html#rdtesting_fpgadspverif_auto',1,'']]],
  ['dsp_20verification_3a_20manual_20test_20procedure_141',['FPGA DSP Verification: Manual Test Procedure',['../page_rdtesting.html#rdtesting_fpgadspverif_manual',1,'']]],
  ['dual_2010_20gigabit_20ethernet_142',['Dual 10 Gigabit Ethernet',['../page_usrp_x3x0.html#autotoc_md59',1,'']]],
  ['dual_20ethernet_20mode_143',['Dual Ethernet mode',['../page_usrp2.html#usrp2_mimocable_dual',1,'']]],
  ['during_20cs_5fserver_20initialization_20in_20vivado_202021_201_144',['Error During cs_server Initialization in Vivado 2021.1',['../md_usrp3_2build__instructions.html#autotoc_md121',1,'']]],
  ['dynamically_20loadable_20modules_145',['Support for dynamically loadable modules',['../page_general.html#general_misc_dynamic',1,'']]]
];
