var searchData=
[
  ['mac_20os_20x_0',['Mac OS X',['../page_build_guide.html#build_instructions_osx',1,'Build Instructions (Mac OS X)'],['../page_install.html#install_osx',1,'Installation on Mac OS X']]],
  ['mac_20os_20x_20specific_20notes_1',['Mac OS X specific notes',['../page_transport.html#transport_udp_osx',1,'']]],
  ['macports_2',['Via MacPorts',['../page_install.html#install_osx_macports',1,'']]],
  ['macros_3',['Macros',['../page_logging.html#logging_macros',1,'Logging Macros'],['../md_usrp3_2sim_2simulation__libraries.html#autotoc_md220',1,'Macros']]],
  ['main_20module_20definition_4',['Main Module Definition',['../md_usrp3_2sim_2legacy__testbenches.html#autotoc_md151',1,'']]],
  ['major_20and_20minor_20compat_20numbers_5',['Major and Minor Compat Numbers',['../page_compat.html#compat_minor_major',1,'']]],
  ['make_6',['Running devtest using UHD make',['../page_rdtesting.html#autotoc_md14',1,'']]],
  ['make_20options_7',['Make Options',['../md_usrp3_2build__instructions.html#autotoc_md148',1,'Xilinx ISE Make Options'],['../md_usrp3_2build__instructions.html#autotoc_md147',1,'Xilinx Vivado Make Options']]],
  ['makefile_8',['Writing a Simulation Makefile',['../md_usrp3_2sim_2writing__sim__makefile.html',1,'']]],
  ['makefile_9',['Customizing the top level makefile',['../md_usrp2_2customize__signal__chain.html#autotoc_md104',1,'']]],
  ['makefile_20based_20builder_10',['Makefile Based Builder',['../md_usrp3_2build__instructions.html#autotoc_md123',1,'']]],
  ['makefile_20based_20builder_11',['Makefile based Builder',['../md_usrp3_2build__instructions.html#autotoc_md117',1,'']]],
  ['makefiles_20with_20cmake_12',['Generate Makefiles with CMake',['../page_build_guide.html#generate_unix',1,'']]],
  ['mako_13',['Mako',['../page_build_guide.html#autotoc_md79',1,'']]],
  ['management_14',['Management',['../md_usrp3_2vivado__env__utils.html#autotoc_md248',1,'Hardware Management'],['../md_usrp3_2vivado__env__utils.html#autotoc_md241',1,'IP Management'],['../page_usrp_x3x0_config.html#x3x0cfg_hostpc_pwr',1,'Power Management'],['../page_usrp_e3xx.html#e3xx_rasm',1,'Remote Management']]],
  ['management_20and_20execution_15',['Salt: Remote configuration management and execution',['../page_usrp_e3xx.html#e3xx_rasm_salt',1,'']]],
  ['manager_16',['Using your package manager',['../page_install.html#install_linux_pkgmgr',1,'']]],
  ['manager_20mpm_20architecture_17',['The Module Peripheral Manager (MPM) Architecture',['../page_mpm.html',1,'page_devices']]],
  ['manual_18',['Manual',['../page_devices.html',1,'Devices &amp; Usage Manual'],['../md_fpga.html',1,'FPGA Manual'],['../page_uhd.html',1,'UHD Development Manual']]],
  ['manual_20gain_20profile_19',['Manual Gain Profile',['../page_zbx.html#zbx_gain_manual',1,'']]],
  ['manual_20install_20of_20libusb_20optional_20',['Manual Install of libUSB (optional)',['../page_install.html#install_libUSB',1,'']]],
  ['manual_20parts_21',['Manual Parts',['../index.html#autotoc_md11',1,'']]],
  ['manual_20phase_20alignment_20testing_20receiver_22',['Manual phase alignment testing (Receiver)',['../page_rdtesting.html#rdtesting_phase_rx_manual',1,'']]],
  ['manual_20procedure_23',['Manual Procedure',['../page_rdtesting.html#rdtesting_bist_e320_manual',1,'E320 Manual Procedure'],['../page_rdtesting.html#rdtesting_bist_n3x0_manual',1,'N300/N310 Manual Procedure']]],
  ['manual_20test_20procedure_24',['Manual Test Procedure',['../page_rdtesting.html#rdtesting_devtest_manual',1,'Devtest: Manual Test Procedure'],['../page_rdtesting.html#rdtesting_fpgadspverif_manual',1,'FPGA DSP Verification: Manual Test Procedure'],['../page_rdtesting.html#rdtesting_fpgafuncverif_manual',1,'FPGA Functional Verification: Manual Test Procedure'],['../page_rdtesting.html#rdtesting_gpsdo_manual',1,'GPSDO: Manual Test Procedure'],['../page_rdtesting.html#rdtesting_fpga_testbenches_manual',1,'Manual Test Procedure']]],
  ['manuals_25',['General Usage Manuals',['../page_devices.html#autotoc_md0',1,'']]],
  ['many_20different_20compat_20numbers_26',['Why are there so many different compat numbers?',['../page_compat.html#compat_faq_whymany',1,'']]],
  ['map_27',['E3XX FPGA Register Map',['../page_usrp_e3xx.html#e3xx_regmap',1,'']]],
  ['mapped_20axi4_20sim_5faxi4_5flib_20vh_28',['Memory Mapped AXI4 (sim_axi4_lib.vh)',['../md_usrp3_2sim_2libs__axi.html#autotoc_md178',1,'']]],
  ['mapping_29',['Mapping',['../page_gpio_api.html#xgpio_fpanel_pins',1,'Pin Mapping'],['../page_gpio_api.html#autotoc_md9',1,'Pin Mapping'],['../page_usrp_e3xx.html#autotoc_md53',1,'Pin Mapping'],['../page_usrp_e3xx.html#autotoc_md55',1,'Pin Mapping'],['../page_usrp_x3x0.html#autotoc_md72',1,'Pin Mapping'],['../page_x400_gpio_api.html#x4x0gpio_fpanel_pins',1,'Pin Mapping']]],
  ['master_20clock_20rate_30',['Master Clock Rate',['../page_usrp_b100.html#b100_mcr',1,'Changing the Master Clock Rate'],['../page_usrp_b200.html#b200_mcr',1,'Changing the Master Clock Rate'],['../page_usrp_e1x0.html#e1x0_mcr',1,'Changing the Master Clock Rate']]],
  ['master_20clock_20rate_20and_20nyquist_31',['Master clock rate and Nyquist',['../page_general.html#general_sampleratenotes_nyquist',1,'']]],
  ['master_20clock_20rate_20tick_20rate_20and_20sampling_20rate_32',['Master Clock Rate, Tick Rate, and Sampling Rate',['../page_twinrx.html#twinrx_dboards_mcr',1,'']]],
  ['master_20clock_20selection_33',['Automatic master-clock selection',['../page_general.html#general_sampleratenotes_automatic',1,'']]],
  ['measurement_20devices_34',['Other measurement devices',['../page_power.html#power_usercal_extend_generic',1,'']]],
  ['memory_20and_20eeprom_35',['Flash Memory and EEPROM',['../page_zbx.html#zbx_flash',1,'']]],
  ['memory_20mapped_20axi4_20sim_5faxi4_5flib_20vh_36',['Memory Mapped AXI4 (sim_axi4_lib.vh)',['../md_usrp3_2sim_2libs__axi.html#autotoc_md178',1,'']]],
  ['mender_3a_20remote_20update_20capability_37',['Mender: Remote update capability',['../page_usrp_e3xx.html#e3xx_rasm_mender',1,'']]],
  ['meta_3a_20axi4_20reader_38',['Meta: AXI4 Reader',['../md_usrp3_2sim_2libs__axi.html#autotoc_md184',1,'']]],
  ['meta_3a_20axi4_20writer_39',['Meta: AXI4 Writer',['../md_usrp3_2sim_2libs__axi.html#autotoc_md183',1,'']]],
  ['method_201_40',['Method 1',['../page_usrp2.html#autotoc_md50',1,'']]],
  ['method_201_20poll_20the_20usrp_20time_20registers_41',['Method 1 - poll the USRP time registers',['../page_sync.html#sync_time_reg',1,'']]],
  ['method_202_20linux_20only_42',['Method 2 (Linux Only)',['../page_usrp2.html#autotoc_md51',1,'']]],
  ['method_202_20query_20the_20gpsdo_20for_20seconds_43',['Method 2 - query the GPSDO for seconds',['../page_sync.html#sync_time_gpsdo',1,'']]],
  ['method_203_20mimo_20cable_44',['Method 3 - MIMO cable',['../page_sync.html#sync_time_mimocable',1,'']]],
  ['method_20in_20a_20subclass_45',['is required to implement the &quot;resolve&quot; method in a subclass.',['../classuhd_1_1experts_1_1worker__node__t.html#autotoc_md259',1,'']]],
  ['mhz_46',['Ref Clock - 10 MHz',['../page_usrp2.html#usrp2_hw_refclk',1,'']]],
  ['mhz_20or_20other_20frequency_47',['Ref Clock (10 MHz or other frequency)',['../page_usrp_x3x0.html#x3x0_hw_x3x0_hw_ref10M',1,'']]],
  ['mhz_20reference_20signals_48',['External PPS and 10 MHz reference signals',['../page_sync.html#sync_commonref_pps',1,'']]],
  ['mhz_20uses_20external_20vcxo_49',['Set 61.44 MHz - uses external VCXO',['../page_usrp_b100.html#b100_mcr_vcxo',1,'']]],
  ['microcontroller_50',['microcontroller',['../page_usrp_e3xx.html#e320_getting_started_serial_micro',1,'Connecting to the microcontroller'],['../page_usrp_e3xx.html#e320_micro',1,'The STM32 microcontroller']]],
  ['migration_20guide_20to_20mpm_20architecture_51',['E310 Migration Guide to MPM architecture',['../page_usrp_e3xx.html#e31x_migration',1,'']]],
  ['mimo_20cable_52',['Using the MIMO Cable',['../page_usrp2.html#usrp2_mimocable',1,'']]],
  ['mimo_20cable_53',['Method 3 - MIMO cable',['../page_sync.html#sync_time_mimocable',1,'']]],
  ['mimo_20cable_20reference_20signals_20n200_20series_20usrp2_54',['MIMO cable reference signals (N200-Series, USRP2)',['../page_sync.html#sync_commonref_mimo',1,'']]],
  ['mimo_20operation_55',['MIMO Operation',['../page_multiple.html#multiple_mimo',1,'']]],
  ['mimo_20with_20sbx_56',['N2x0 MIMO with SBX',['../page_rdtesting.html#rdtesting_phase_rx_N2x0_MIMO',1,'']]],
  ['mimo_20xcvr_20board_57',['E310 MIMO XCVR board',['../page_dboards.html#dboards_e300',1,'']]],
  ['mini_20targets_20and_20outputs_58',['B2xx-mini Targets and Outputs',['../md_usrp3_2build__instructions.html#autotoc_md128',1,'']]],
  ['minor_20compat_20numbers_59',['Major and Minor Compat Numbers',['../page_compat.html#compat_minor_major',1,'']]],
  ['miscellaneous_60',['Miscellaneous',['../page_usrp2.html#usrp2_misc',1,'Miscellaneous'],['../page_usrp_b100.html#b100_misc',1,'Miscellaneous'],['../page_usrp_e1x0.html#e1x0_misc',1,'Miscellaneous'],['../page_usrp_x3x0.html#x3x0_misc',1,'Miscellaneous']]],
  ['miscellaneous_20notes_61',['Miscellaneous Notes',['../page_general.html#general_misc',1,'']]],
  ['missing_20and_20emulated_20features_62',['Missing and Emulated Features',['../page_usrp1.html#usrp1_emul',1,'']]],
  ['missing_20features_63',['List of missing features',['../page_usrp1.html#usrp1_emul_listmissing',1,'']]],
  ['mode_64',['Mode',['../page_mpm.html#mpm_shell_hijack',1,'Hijack Mode'],['../page_usrp_e3xx.html#e3xx_getting_started_network_mode',1,'Network Mode'],['../page_mpm.html#mpm_modes',1,'Network vs. Embedded Mode'],['../page_x400_gpio_api.html#x4x0_spi_iface',1,'The x4x0 SPI Mode'],['../page_rdtesting.html#autotoc_md21',1,'USRP E3xx Device (Embedded Mode)']]],
  ['mode_65',['mode',['../page_usrp2.html#usrp2_mimocable_dual',1,'Dual Ethernet mode'],['../page_rdtesting.html#autotoc_md44',1,'Embedded mode'],['../page_rdtesting.html#autotoc_md48',1,'Embedded mode'],['../page_usrp2.html#usrp2_mimocable_shared',1,'Shared Ethernet mode']]],
  ['models_66',['Models',['../page_gpsdo.html',1,'Internal GPSDO (USRP-N2x0/E1X0 Models)'],['../page_gpsdo_b2x0.html',1,'Internal GPSDO Application Notes (USRP-B2x0 Models)'],['../page_gpsdo_x3x0.html',1,'Internal GPSDO Application Notes (USRP-X3x0 Models)']]],
  ['modelsim_67',['Simulating with ModelSim',['../md_usrp3_2sim_2running__testbenches.html#autotoc_md210',1,'']]],
  ['modelsim_20optional_68',['Download and Install ModelSim (Optional)',['../md_usrp3_2build__instructions.html#autotoc_md113',1,'']]],
  ['modelsim_20or_20questa_69',['ModelSim or Questa',['../md_usrp3_2sim_2running__testbenches.html#autotoc_md212',1,'Compiling the Simulation with ModelSim or Questa'],['../md_usrp3_2sim_2running__testbenches.html#autotoc_md207',1,'Using Siemens ModelSim or Questa']]],
  ['modelsim_20or_20questasim_70',['Setting Up ModelSim or QuestaSim',['../md_usrp3_2sim_2running__testbenches.html#autotoc_md208',1,'']]],
  ['modelsim_20questa_20not_20found_71',['ModelSim/Questa Not Found',['../md_usrp3_2sim_2running__testbenches.html#autotoc_md215',1,'']]],
  ['modelsim_20simulation_20libraries_20not_20found_72',['ModelSim Simulation Libraries Not Found',['../md_usrp3_2sim_2running__testbenches.html#autotoc_md216',1,'']]],
  ['modelsim_20specific_73',['ModelSim Specific',['../md_usrp3_2vivado__env__utils.html#autotoc_md240',1,'']]],
  ['modelsim_20through_20vivado_74',['Simulating with ModelSim through Vivado',['../md_usrp3_2sim_2running__testbenches.html#autotoc_md209',1,'']]],
  ['modification_75',['External clock modification',['../page_usrp1.html#usrp1_hw_extclk',1,'']]],
  ['modify_20calibration_20data_76',['Modify Calibration Data',['../page_calibration.html#modify_cal_data',1,'']]],
  ['modify_20existing_20vivado_20block_20design_20bd_77',['Modify existing Vivado Block Design (BD)',['../md_usrp3_2vivado__env__utils.html#autotoc_md244',1,'']]],
  ['modify_20existing_20vivado_20ip_78',['Modify existing Vivado IP',['../md_usrp3_2vivado__env__utils.html#autotoc_md243',1,'']]],
  ['modify_20existing_20vivado_20tcl_20based_20block_20design_79',['Modify existing Vivado Tcl-based Block Design',['../md_usrp3_2vivado__env__utils.html#autotoc_md245',1,'']]],
  ['modify_20to_20use_20motherboard_20oscillator_80',['RFX - Modify to use motherboard oscillator',['../page_dboards.html#dboards_rfxmod',1,'']]],
  ['modifying_20and_20compiling_20uhd_20and_20mpm_20for_20the_20e320_81',['Modifying and compiling UHD and MPM for the E320',['../page_usrp_e3xx.html#e3xx_software_dev',1,'']]],
  ['modifying_20for_20other_20boards_20that_20usrp1_82',['DBSRX - Modifying for other boards that USRP1',['../page_dboards.html#dboards_dbsrxmod',1,'']]],
  ['module_83',['Writing a Top-level Simulation Module',['../md_usrp3_2sim_2writing__sim__top.html',1,'']]],
  ['module_84',['Sending custom commands to the GPS module',['../page_gpsdo_x3x0.html#gpsdox_custom_cmds',1,'']]],
  ['module_20definition_85',['Main Module Definition',['../md_usrp3_2sim_2legacy__testbenches.html#autotoc_md151',1,'']]],
  ['module_20peripheral_20manager_20mpm_20architecture_86',['The Module Peripheral Manager (MPM) Architecture',['../page_mpm.html',1,'page_devices']]],
  ['modules_87',['modules',['../md_usrp2_2customize__signal__chain.html#autotoc_md105',1,'Inserting custom modules'],['../page_general.html#general_misc_dynamic',1,'Support for dynamically loadable modules']]],
  ['modules_20for_20x_20series_20pcie_20connectivity_88',['NI RIO Kernel Modules for X-Series PCIe Connectivity',['../page_ni_rio_kernel.html',1,'page_usrp_x3x0']]],
  ['monitor_20the_20host_20network_20traffic_89',['Monitor the host network traffic',['../page_usrp2.html#usrp2_commprob_wireshark',1,'Monitor the host network traffic'],['../page_usrp_x3x0.html#x3x0_comm_issues_monitor',1,'Monitor the host network traffic']]],
  ['monitor_20the_20serial_20output_90',['Monitor the serial output',['../page_usrp2.html#usrp2_commprob_uart',1,'']]],
  ['motherboard_91',['Motherboard',['../page_usrp_x3x0_config.html#x3x0cfg_hosthw_mb',1,'']]],
  ['motherboard_20clock_92',['Motherboard clock',['../page_usrp_x3x0.html#x3x0_set_clocking_mboard',1,'']]],
  ['motherboard_20oscillator_93',['RFX - Modify to use motherboard oscillator',['../page_dboards.html#dboards_rfxmod',1,'']]],
  ['motherboard_20slot_20names_94',['Motherboard Slot Names',['../page_configuration.html#config_subdev_slotnames',1,'USRP Family Motherboard Slot Names'],['../page_configuration.html#config_subdev_default',1,'USRP Family Motherboard Slot Names']]],
  ['move_20the_20clock_20configuration_20resistor_95',['Step 1: Move the clock configuration resistor',['../page_dboards.html#dboards_dbsrxmod_1',1,'']]],
  ['mpm_96',['Configuring MPM',['../page_configfiles.html#configfiles_usrps_mpm',1,'']]],
  ['mpm_20architecture_97',['The Module Peripheral Manager (MPM) Architecture',['../page_mpm.html',1,'page_devices']]],
  ['mpm_20architecture_98',['E310 Migration Guide to MPM architecture',['../page_usrp_e3xx.html#e31x_migration',1,'']]],
  ['mpm_20configuration_20files_99',['Device Configuration through MPM configuration files',['../page_configuration.html#config_mpm',1,'']]],
  ['mpm_20devices_20n310_20e320_20x4x0_100',['MPM Devices (N310, E320, X4x0)',['../page_compat.html#compat_mpm',1,'']]],
  ['mpm_20for_20the_20e320_101',['Modifying and compiling UHD and MPM for the E320',['../page_usrp_e3xx.html#e3xx_software_dev',1,'']]],
  ['mpm_20natively_102',['Compiling MPM natively',['../page_usrp_e3xx.html#e3xx_software_dev_mpm_native',1,'']]],
  ['mpm_20tools_103',['MPM Tools',['../page_mpm.html#mpm_debug_other',1,'']]],
  ['msvc_20command_20line_104',['Build the project in MSVC (command line)',['../page_build_guide.html#build_msvc_cmd_line',1,'']]],
  ['mtu_105',['Configuring the MTU',['../page_usrp_x3x0_config.html#x3x0cfg_hostpc_netcfg_mtu',1,'']]],
  ['mtu_106',['MTU (&lt;span class=&quot;tt&quot;&gt;mtu&lt;/span&gt;)',['../page_properties.html#props_special_props_mtu',1,'']]],
  ['mtu_20mtu_107',['MTU (&lt;span class=&quot;tt&quot;&gt;mtu&lt;/span&gt;)',['../page_properties.html#props_special_props_mtu',1,'']]],
  ['multi_20channel_20blocks_20and_20resource_20types_108',['Properties on multi-channel blocks and resource types',['../page_properties.html#props_multichan',1,'']]],
  ['multi_20usrp_109',['High-Level: The Multi-USRP',['../page_coding.html#coding_api_hilevel',1,'']]],
  ['multi_20usrp_20clock_110',['High-Level: The Multi-USRP-Clock',['../page_coding.html#coding_api_hilevelclock',1,'']]],
  ['multiple_20channels_20using_20a_20shared_20lo_111',['Tuning multiple channels using a shared LO',['../page_general.html#general_tuning_multiplechannels',1,'']]],
  ['multiple_20device_20configuration_112',['Multiple device configuration',['../page_usrp2.html#usrp2_',1,'Multiple device configuration'],['../page_usrp_x3x0.html#x3x0_addressing_multidevcfg',1,'Multiple device configuration']]],
  ['multiple_20devices_20per_20host_113',['Multiple devices per host',['../page_usrp2.html#usrp2_network_multidev',1,'Multiple devices per host'],['../page_usrp_x3x0.html#x3x0_setup_network_multidevs',1,'Multiple devices per host']]],
  ['multiple_20paths_20at_20once_114',['Calibrating multiple paths at once',['../page_power.html#power_cal_switch',1,'']]],
  ['multiple_20rx_20channels_115',['Multiple RX channels',['../page_usrp2.html#usrp2_misc_multirx',1,'Multiple RX channels'],['../page_usrp_x3x0.html#x3x0_misc_multirx',1,'Multiple RX channels']]],
  ['multiple_20timed_20command_20advisory_116',['Multiple Timed Command Advisory',['../page_usrp_x3x0.html#x3x0_misc_timed_cmds_lockup',1,'']]],
  ['multiple_20usrp_20configurations_117',['Multiple USRP configurations',['../page_multiple.html',1,'page_devices']]],
  ['must_20have_20an_20equality_20operator_118',['- Must have an equality operator (==)',['../classuhd_1_1experts_1_1data__node__t.html#autotoc_md254',1,'']]],
  ['my_20usrp_20have_119',['my USRP have',['../md_usrp2_2build__instructions.html#autotoc_md97',1,'What FPGA does my USRP have?'],['../md_usrp3_2build__instructions.html#autotoc_md110',1,'What FPGA does my USRP have?']]]
];
