var searchData=
[
  ['wait_5ffor_5fbubble_0',['wait_for_bubble',['../md_usrp3_2sim_2libs__axi.html#autotoc_md160',1,'wait_for_bubble'],['../md_usrp3_2sim_2libs__axi.html#autotoc_md173',1,'wait_for_bubble']]],
  ['wait_5ffor_5fpkt_1',['wait_for_pkt',['../md_usrp3_2sim_2libs__axi.html#autotoc_md161',1,'wait_for_pkt'],['../md_usrp3_2sim_2libs__axi.html#autotoc_md174',1,'wait_for_pkt']]],
  ['wait_5ffor_5fpkt_5fget_5finfo_2',['wait_for_pkt_get_info',['../md_usrp3_2sim_2libs__axi.html#autotoc_md175',1,'']]],
  ['wbx_20series_3',['WBX Series',['../page_dboards.html#dboards_wbx',1,'']]],
  ['what_20fpga_20does_20my_20usrp_20have_4',['What FPGA does my USRP have',['../md_usrp2_2build__instructions.html#autotoc_md97',1,'What FPGA does my USRP have?'],['../md_usrp3_2build__instructions.html#autotoc_md110',1,'What FPGA does my USRP have?']]],
  ['which_20commands_20can_20be_20timed_5',['Which commands can be timed?',['../page_timedcmds.html#timedcmds_gen_cmds_what',1,'']]],
  ['why_20are_20there_20so_20many_20different_20compat_20numbers_6',['Why are there so many different compat numbers?',['../page_compat.html#compat_faq_whymany',1,'']]],
  ['why_20is_20only_20one_20version_20of_20the_20compat_20number_20supported_7',['Why is only one version of the compat number supported?',['../page_compat.html#compat_faq_why1',1,'']]],
  ['windows_8',['Windows',['../page_build_guide.html#build_instructions_windows',1,'Build Instructions (Windows)'],['../page_usrp_x3x0.html#x3x0_comm_issues_not_enumerated_win',1,'Device not enumerated over PCI-Express (Windows)'],['../page_transport.html#transport_usb_installwin',1,'Install USB driver (Windows)'],['../page_install.html#install_win',1,'Installation on Windows'],['../page_ni_rio_kernel.html#win_install',1,'Installing NI-USRP in Windows'],['../page_python.html#python_install_windows',1,'Installing on Windows'],['../page_usrp_e3xx.html#update_sdcard_windows',1,'On Windows'],['../page_ni_rio_kernel.html#win_uninstall',1,'Uninstalling NI-USRP in Windows'],['../page_usrp2.html#usrp2_load_cardburnerwin',1,'Use the card burner tool (Windows)']]],
  ['windows_20ni_20rio_20installation_20and_20usage_9',['Windows NI RIO Installation and Usage',['../page_ni_rio_kernel.html#windows_rio',1,'']]],
  ['windows_20specific_20notes_10',['Windows specific notes',['../page_transport.html#transport_udp_windows',1,'']]],
  ['windows_20using_20cygwin_11',['Setting up build dependencies on Windows (using Cygwin)',['../md_usrp3_2build__instructions.html#autotoc_md115',1,'']]],
  ['wire_20data_20format_20specification_12',['Over-the-wire Data Format Specification',['../page_configuration.html#config_stream_args_otw_format',1,'']]],
  ['with_20accessors_13',['with accessors.',['../classuhd_1_1experts_1_1node__retriever__t.html#autotoc_md255',1,'']]],
  ['with_20atr_20control_14',['CPLD-Table Gain Profile with ATR control',['../page_zbx.html#zbx_gain_table',1,'']]],
  ['with_20b206mini_20tutorials_15',['Getting Started with B206mini Tutorials',['../page_usrp_b200.html#getting_started_tutorials',1,'']]],
  ['with_20cmake_16',['with CMake',['../page_build_guide.html#generate_unix',1,'Generate Makefiles with CMake'],['../page_build_guide.html#cmake_win',1,'Generate the project with CMake']]],
  ['with_20modelsim_17',['Simulating with ModelSim',['../md_usrp3_2sim_2running__testbenches.html#autotoc_md210',1,'']]],
  ['with_20modelsim_20or_20questa_18',['Compiling the Simulation with ModelSim or Questa',['../md_usrp3_2sim_2running__testbenches.html#autotoc_md212',1,'']]],
  ['with_20modelsim_20through_20vivado_19',['Simulating with ModelSim through Vivado',['../md_usrp3_2sim_2running__testbenches.html#autotoc_md209',1,'']]],
  ['with_20nsamps_5fper_5fbuff_200_20',['Calling recv() with nsamps_per_buff = 0',['../classuhd_1_1rx__streamer.html#stream_rx_nsamps_zero',1,'']]],
  ['with_20questasim_21',['Simulating with QuestaSim',['../md_usrp3_2sim_2running__testbenches.html#autotoc_md211',1,'']]],
  ['with_20sbx_22',['N2x0 MIMO with SBX',['../page_rdtesting.html#rdtesting_phase_rx_N2x0_MIMO',1,'']]],
  ['with_20sbx_20or_20ubx_23',['X3x0 with SBX or UBX',['../page_rdtesting.html#rdtesting_phase_rx_X3x0_sbx_ubx',1,'']]],
  ['with_20settling_20time_20after_20tuning_20on_20receive_3a_24',['Pseudo-code for dealing with settling time after tuning on receive:',['../page_general.html#general_tuning_waitcode',1,'']]],
  ['with_20the_20b2x0_20and_20gpsdo_25',['Using a power supply with the B2x0 and GPSDO',['../page_gpsdo_b2x0.html#gpsdob_power',1,'']]],
  ['with_20twinrx_26',['X3x0 with TwinRX',['../page_rdtesting.html#rdtesting_phase_rx_X3x0_twinrx',1,'']]],
  ['with_20uhd_27',['with UHD',['../page_octoclock.html#uhd',1,'Communication with UHD'],['../page_usrp_x3x0_config.html#x3x0cfg_hostpc_rtprio_thread',1,'Thread Priority Scheduling with UHD']]],
  ['with_20uhd_20device_20args_28',['Enabling DPDK with UHD Device Args',['../page_dpdk.html#dpdk_device_args',1,'']]],
  ['with_20volk_29',['Compiling GNURadio with Volk',['../page_usrp_x3x0_config.html#x3x0cfg_hostpc_volk_volk',1,'']]],
  ['with_20xilinx_20chipscope_30',['with Xilinx Chipscope',['../page_usrp_e3xx.html#e31x_hw_chipscope',1,'Debugging custom FPGA designs with Xilinx Chipscope'],['../page_usrp_x3x0.html#x3x0_hw_chipscope',1,'Debugging custom FPGA designs with Xilinx Chipscope']]],
  ['without_20atr_20control_31',['CPLD-Table Gain Profile without ATR control',['../page_zbx.html#zbx_gain_tablenoatr',1,'']]],
  ['worker_20node_20data_20node_20dependency_32',['to establish a worker node =&amp;gt; data node dependency',['../classuhd_1_1experts_1_1data__writer__t.html#autotoc_md258',1,'']]],
  ['worker_20node_20dependency_33',['a data node =&amp;gt; worker node dependency',['../classuhd_1_1experts_1_1data__reader__t.html#autotoc_md257',1,'']]],
  ['workers_20are_20derived_20from_20this_20class_34',['graph. Data nodes and workers are derived from this class.',['../classuhd_1_1experts_1_1dag__vertex__t.html#autotoc_md253',1,'']]],
  ['write_20and_20read_20on_20spi_35',['Write and read on SPI',['../page_x400_gpio_api.html#x4x0_spi_r_w',1,'']]],
  ['write_20data_36',['Write Data',['../md_usrp3_2sim_2libs__axi.html#autotoc_md180',1,'']]],
  ['write_20response_37',['Write Response',['../md_usrp3_2sim_2libs__axi.html#autotoc_md181',1,'']]],
  ['writeline_38',['writeline',['../md_usrp3_2sim_2libs__general.html#autotoc_md204',1,'']]],
  ['writer_39',['Meta: AXI4 Writer',['../md_usrp3_2sim_2libs__axi.html#autotoc_md183',1,'']]],
  ['writing_20a_20simulation_20makefile_40',['Writing a Simulation Makefile',['../md_usrp3_2sim_2writing__sim__makefile.html',1,'']]],
  ['writing_20a_20testbench_41',['Writing a Testbench',['../md_usrp3_2sim_2writing__testbenches.html',1,'']]],
  ['writing_20a_20top_20level_20simulation_20module_42',['Writing a Top-level Simulation Module',['../md_usrp3_2sim_2writing__sim__top.html',1,'']]],
  ['wx_43',['WX',['../page_rdtesting.html#autotoc_md36',1,'WX'],['../page_rdtesting.html#autotoc_md42',1,'WX']]]
];
